Sigma-delta digital-to-analog converters (DACs) have gained wide popularity in integrated circuit design due to the high resolution and high linearity obtainable without the need for precise matching of on-chip components. The digital modulator shapes the quantization noise to be very low in the passband and much higher at out-of-band frequencies. The actual conversion to an analog signal is then performed by a very coarse DAC, which is typically implemented with a switched capacitor circuit or a current-mode DAC. In the latter case, an array of current sources, either binarily-weighted or monotonic, is switched relative to the code coming out of the digital modulator.
In the case where the full DAC function is used in a stereo audio application, there are typically four analog outputs that represent the final signals. The two stereo channels represent the left and right signals, but there is also a front and rear signal for both the left and right channels. If the front-to-rear fading is done in the digital domain, then the entire DAC function (i.e. the interpolation filter, the digital modulator, and the analog DAC) must be replicated twice for each channel resulting in four converters. This is very inefficient in terms of area and power consumption. If the fading can be done in the analog domain, only the final filter must be repeated four times, and a big savings in area and power in realized.
Implementing the fading function in the analog portion of the DAC, however, causes some difficult circuit design problems since the linearity of the modulator can be in the 95 decibel (dB) range. This means that the programmable gain function must not introduce any distortion that would degrade the overall converter performance. In the case of the current-mode DAC, several options are available to attenuate, or steer the signal current away from the output resulting in attenuation.
If the current-to-voltage conversion is performed with an operational amplifier and a feedback resistor, the attenuation can be performed by switching legs of a resistor to change the effective value. Unfortunately, in a complementary metal-oxide-semiconductor (CMOS) process, the switches are implemented with transistors, which have an `on` resistance that varies with current and voltage. The size of transistor necessary to bring the distortion to an acceptable level then becomes prohibitive. If a current-steering circuit is used which implements saturated transistors to provide current division the problem then becomes the gate-to-source voltage (V.sub.GS) modulation of the divider, which results in a drain-to-source voltage (V.sub.DS) modulation of the current sources in the DAC. This creates distortion unless the output impedance of the DAC is extremely high, but then the issue of headroom comes into play.
Therefore, the present invention strives to overcome these problems resulting in an efficient solution to the problem of linear attenuation of the analog signal from a source such as a current-mode DAC.